```{_ex4_submission}
```

# Ex. 4: DMA / TL-UL host implementation

Group: **rvlab01**

### 1. Source texts

See Appendix

### 2. Wave views

## `memcpy_hard`

![Waveform `memcpy_hard`](res/Ex4_memcpy_hard.png)

The cursors show where the write request completes.

\newpage

## `memcpy_soft`

![Waveform `memcpy_soft`](res/Ex4_memcpy_soft.png)

The transfer of one word happens between the two cursors.

### 3. Benchmarking results

| operation                   | software [cycles]   | hardware [cycles] | ratio |
|-----------------------------|---------------------|-------------------|-------|
| memset of 1kB in SRAM       | 2836                | 584               | 4.856 |
| memset of 1kB in DDR3       | 2976                | 1813              | 1.641 |
| memcpy of 1kB SRAM to SRAM  | 3347                | 1095              | 3.057 |
| memcpy of 1kB DDR3 to SRAM  | 3428                | 2201              | 1.557 |

## Appendix:
  - [`student_dma.sv`](#student-dma-verilog)
  - [`dma/memcpy.c`](#memcpy-c)
  - [`dma/main.c`](#memcpy-tests)