RISC-V Lab
Contents:
Exercise Sheets & Slides
Project
Tasks
Requirements & Functional Specification
High Level Design
Results
Design Reference
Tutorials
Resources
Submissions
FlexDI
RISC-V Lab
Project
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Project
Contents:
Tasks
1. Specification
2. High level design
3. HW module creation
4. System integration & tests
5. FPGA upload & application development
6. Live demonstration
7. Presentations
8. Project documentation
Deliverables
Requirements & Functional Specification
Requirements Specification
Functional Specification
High Level Design
Hardware top level block diagram
Software top level block diagram
Module specification
Results